1. Field of the Invention
The present invention relates to a display panel and, more particularly, to a display panel using light-emitting elements.
2. Description of the Related Art
In recent years, as display apparatuses using new video display methods replacing cathode ray tubes (CRTs), liquid crystal displays (LCDs) using liquid crystal panels, EL displays using electroluminescence (EL) phenomenon, and plasma displays using plasma display panels (to be referred to as PDPs hereinafter) have been developed.
EL displays are roughly classified into inorganic EL displays using an inorganic compound for electroluminescent elements (to be referred to as EL elements hereinafter) and organic EL displays using an organic compound. Development of organic EL displays is progressing because they allow easy manufacturing of color displays and can also operate at low voltages as compared to inorganic EL displays.
Organic EL display panels used in the organic EL displays can be driven by a passive driving method or an active matrix driving method. Organic EL display panels which employ the active matrix driving method are more excellent than those of the passive driving method because of high contrast and high resolution.
In a conventional organic electroluminescent display panel using the active matrix driving method described in, e.g., Jpn. Pat. Appln. KOKAI Publication No. 8-330600, an organic EL element, a driving transistor which supplies a current to the organic EL element when a voltage signal corresponding to image data is applied to the gate, and a switching transistor which performs switching to supply the voltage signal corresponding to image data to the gate of the driving transistor are arranged for each pixel. In this organic EL display panel, when a scan line is selected, the switching transistor is turned on. In a moment, a voltage of level representing the luminance is applied to the gate of the driving transistor through a signal line. The driving transistor is turned on. A driving current having a magnitude corresponding to the level of the gate voltage is supplied from the power supply to the organic EL element through the source-to-drain path of the driving transistor. The organic EL element emits light at a luminance corresponding to the magnitude of the current. During the period from the end of scan line selection to the next scan line selection, the level of the gate voltage of the driving transistor is continuously held even after the switching transistor is turned off. Hence, the organic EL element emits light at a luminance corresponding to the magnitude of the driving current.
In the above-described organic EL display panel, a voltage drop or a signal delay through interconnections occurs due to the electrical resistance of an interconnection such as a power supply line which supplies a current to a plurality of organic EL elements simultaneously. As a measure to suppress the voltage drop or signal delay, a method of reducing the resistance of the interconnection by increasing the thickness or width of the interconnection has been examined. This interconnection is formed by using the gate metal or source/drain metal of a thin-film transistor such as a driving transistor to operate an organic EL element. However, the thickness of an electrode of a thin-film transistor is designed in accordance with the required characteristic. In other words, the electrode is not designed assuming that it supplies a current to a light-emitting element. Hence, if a current is supplied from the interconnection to a plurality of light-emitting elements simultaneously, a voltage drop occurs, or the current flow through the interconnection delays due to the electrical resistance of the interconnection. To suppress the voltage drop or interconnection delay, the resistance of the interconnection is preferably low. If the resistance of the interconnection is reduced by patterning a metal layer serving as the source and drain electrodes of the transistor or a metal layer serving as the gate electrode considerably wide to sufficiently flow the current, the overlap area of the interconnection on another interconnection or conductor when viewed from the upper side increases, and a parasitic capacitance is generated between them. This retards the flow of the current. Alternatively, in a so-called bottom emission structure which emits EL light from the transistor array substrate side, light emitted from the EL elements is shielded by the interconnections, resulting in a decrease in opening ratio, i.e., the ratio of the light emission area. If the gate electrode of the thin-film transistor is made thick to lower the resistance, the etching accuracy becomes low. In addition, a planarization film (corresponding to a gate insulating film when the thin-film transistor has, e.g., an inverted stagger structure) to eliminate the step of the gate electrode must also be formed thick. This may lead to a large change in transistor characteristic. When the source and drain electrodes are formed thick, the etching accuracy of the source and drain electrodes degrades. This may also adversely affect the transistor characteristic.